CURRICULUM VITAE

 

 

Name:                                     Béla Fehér

Place and date of birth:       Ajka, January  18, 1959.

Nationality:                           Hungarian

Marital status:                      Married, two children

Address:                                                H-2092. Budakeszi, Ady Endre u. 21, HUNGARY

Affiliation:                             Department of Measurement and Information Systems,

Technical University of Budapest, since 1983.

Mailing address:                  H-1117 Budapest, Magyar tudósok krt. 2.  

Phone number:                     +36 1 463-2686, +36 1 463 2057

Fax number:                           +36 1 463-4112,

Email:                                      feher@mit.bme.hu

Post:                                       Associate professor, head of FPGA and Embedded Systems Design Laboratory

 

Studies:

                Ságvári Endre Secondary School      1974-1978

                Technical University of Budapest    1978-1983

                Postgraduate Student                         1983-1986

Degree:

                Candidate of Sciences from the Hungarian Academy of Sciences: 1994.

 PhD. from the Technical University of Budapest: 1995.

 

Educational activities

Lectures in Basic and Advanced Electronics, Electronic Measurement Instruments, 

Digital Systems, Logic Design, System on a Programmable Chips

 

Languages

                English, fluently spoken

               

Scholarships, scientific activity abroad:

1991       1 month scholarship to the Universiti Teknologi Malaysia, Kuala Lumpur. Invited lectures and research grant in the field of Digital Signal Processing using FPGAs and its applications

1994       1 month scholarship to Politecnico di Milano (Italy), in the frame of  PHARE ACCORD MASIP project, research work in Parallel Computing Structures

1995       3 weeks scholarships to Texas State University, at  Arlington (USA), invited lectures and research in the field of Parallel Image Compressing algorithms

1995       1 year postdoctoral scholarship to Delft University of Technology, (The Netherlands). Research work in the field of Digital Signal Processing Algorithms.

 

Research Contracts

1983-1985               High Speed Microprogrammable DSP System

                1986-1987               MO-51 Microprogrammed CPU Emulaor

                1987-1989               Precision Current and Voltage Transformer Calibrator

                1988-1992               High Speed Microprogrammed Card Tester

1994-1995               Parallel Floating Point CNN Emulator

1997-1998                      Speed Converter Unit for the MOL OTR2000 Telemetry System

 

Patents

                207781/1989           Current and Voltage Generator for Calibrators

                207772/1990           Signature Generation in Multi-channel Digital Systems

                P9603632/10          IR Telemetry System for Movement and Position Measurement

 

International Research Grants

1993-1994               MASIP: Mapping Signal Processing Algorithms onto Parallel Processors,

PHARE ACCORD project

1994-1996               Introducing Parallel Processing into the Curriculum of

Hungarian Higher Education Institutions of Technology,

TEMPUS project

1996-1997               HUMIC: Hungarian Microelectronics Information Center,

PHARE TDQM project

1996-1998                      ACCUSE: Application of custom computing in the evaluation and construction of multiprocessor systems,

German-Hungarian S&T Cooperation

                1997-1999               INTCOM: Intelligent Systems in Control and Measurement

                                                TEMPUS project

1998-2001                      VILAB: Microelectronics virtual laboratory for cooperation in research and knowledge transfer 

                                                Copernicus project

2002-2003                      JENET Joint European Network on Embedded Internet Technologies

IST FP5 project

Industrial Positions

                1997-1998               Compaq Computers Ltd. (Hungary) Consultant,

                                                Professional field: Fibre Channel and Storage Network Technology

1999-2002                      AG-E Ltd. (Germany) Consultant, Head of FPGA Design Division

Professional field: Field Bus applications (PROFIBUS, INTERBUS)

 

National Research Grants

                1997-1998               Reconfigurable Computing Architectures

                                                MKM FKFP 0413/1997

 

Memberships

                1986-2002               MATE Measurement and Automation Society

                1996-2002               MTA Community Member, Technical Sciences            

1997-1998                      IEEE Computer Society

 

Scholarships

1995-1996                      Delft University of Technology (The Netherlands), 1 year

1998-2001                      Bolyai János Research Scholarship, 3 year

2003-2006               Széchenyi István Scholarship, 3 year

 

Research Fields

                Programmable Logic Devices and their applications

                High Level Synthesis in HDL

Hardware Description Languages (VHDL, Verilog, Handel-C, Java HDL)

                Reconfigurable Computing Architectures

                SW-HW Codesign

                Parallel Signal Processing

                Telemetry Systems, Field Buses

                Embedded Systems

                System on a Programmable Chips