datapath Project Status (05/15/2011 - 01:24:34)
Project File: MiniCISC_CPU.xise Parser Errors: No Errors
Module Name: controller_fsm Implementation State: Synthesized
Target Device: xc3s250e-4tq144
  • Errors:
 
Product Version:ISE 13.1
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment:  
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 05/15/2011 - 01:27:54