Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:13.1 (WebPack) - O.40d Target Family: Spartan3E
OS Platform: NT Target Device: xc3s250e
Project ID (random number) dd8f9b87039a4b22ad5d22f643b5434c.124D7235780B42AABDC4D2335D4A8EF4.10 Target Package: tq144
Registration ID __0_0_0 Target Speed: -4
Date Generated 2011-05-15T12:00:57 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 32-bit OS Release major release (build 7600)
CPU Name Intel(R) Core(TM) i3 CPU 530 @ 2.93GHz CPU Speed 2942 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=1
  • 9-bit addsub=1
Counters=1
  • 8-bit up counter=1
FSMs=1 Multiplexers=14
  • 1-bit 4-to-1 multiplexer=8
  • 2-bit 4-to-1 multiplexer=1
  • 8-bit 4-to-1 multiplexer=3
  • 9-bit 4-to-1 multiplexer=2
RAMs=1
  • 256x8-bit single-port distributed RAM=1
Registers=102
  • Flip-Flops=102
Xors=1
  • 8-bit xor2=1
MiscellaneousStatistics
  • AGG_BONDED_IO=41
  • AGG_IO=41
  • AGG_SLICE=242
  • NUM_4_INPUT_LUT=392
  • NUM_BONDED_IBUF=16
  • NUM_BONDED_IOB=25
  • NUM_BSCAN=1
  • NUM_BUFGMUX=3
  • NUM_CYMUX=15
  • NUM_LUT_RT=10
  • NUM_RAM32=128
  • NUM_SLICEL=178
  • NUM_SLICEM=64
  • NUM_SLICE_FF=114
  • NUM_XOR=17
NetStatistics
  • NumNets_Active=469
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=135
  • NumNodesOfType_Active_CNTRLPIN=135
  • NumNodesOfType_Active_DOUBLE=1451
  • NumNodesOfType_Active_DUMMY=1360
  • NumNodesOfType_Active_DUMMYESC=16
  • NumNodesOfType_Active_GLOBAL=77
  • NumNodesOfType_Active_HFULLHEX=9
  • NumNodesOfType_Active_HUNIHEX=70
  • NumNodesOfType_Active_INPUT=1654
  • NumNodesOfType_Active_IOBOUTPUT=15
  • NumNodesOfType_Active_OMUX=377
  • NumNodesOfType_Active_OUTPUT=412
  • NumNodesOfType_Active_PREBXBY=481
  • NumNodesOfType_Active_VFULLHEX=85
  • NumNodesOfType_Active_VLONG=20
  • NumNodesOfType_Active_VUNIHEX=149
  • NumNodesOfType_Gnd_DOUBLE=2
  • NumNodesOfType_Gnd_DUMMY=2
  • NumNodesOfType_Gnd_INPUT=3
  • NumNodesOfType_Gnd_OMUX=3
  • NumNodesOfType_Gnd_OUTPUT=2
  • NumNodesOfType_Gnd_PREBXBY=1
SiteStatistics
  • IBUF-DIFFMI=3
  • IBUF-DIFFSI=3
  • IOB-DIFFM=11
  • IOB-DIFFS=12
  • SLICEL-SLICEM=77
SiteSummary
  • BSCAN=1
  • BSCAN_BSCAN_BLACKBOX=1
  • BUFGMUX=3
  • BUFGMUX_GCLKMUX=3
  • BUFGMUX_GCLK_BUFFER=3
  • IBUF=16
  • IBUF_INBUF=16
  • IBUF_PAD=16
  • IOB=25
  • IOB_OUTBUF=25
  • IOB_PAD=25
  • SLICEL=178
  • SLICEL_C1VDD=1
  • SLICEL_CYMUXF=8
  • SLICEL_CYMUXG=7
  • SLICEL_F=133
  • SLICEL_F5MUX=41
  • SLICEL_F6MUX=10
  • SLICEL_FFX=70
  • SLICEL_FFY=44
  • SLICEL_G=131
  • SLICEL_GNDF=3
  • SLICEL_GNDG=3
  • SLICEL_XORF=9
  • SLICEL_XORG=8
  • SLICEM=64
  • SLICEM_F=64
  • SLICEM_F5MUX=64
  • SLICEM_G=64
  • SLICEM_WSGEN=64
 
Configuration Data
BUFGMUX
  • S=[S_INV:3] [S:0]
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:3]
  • S=[S_INV:3] [S:0]
IBUF_PAD
  • IOATTRBOX=[LVCMOS25:16]
  • PULL=[PULLDOWN:2]
IOB
  • O1=[O1_INV:0] [O1:25]
IOB_OUTBUF
  • IN=[IN_INV:0] [IN:25]
IOB_PAD
  • DRIVEATTRBOX=[12:25]
  • IOATTRBOX=[LVCMOS25:25]
  • SLEW=[SLOW:25]
SLICEL
  • BX=[BX_INV:0] [BX:85]
  • BY=[BY:53] [BY_INV:0]
  • CE=[CE:51] [CE_INV:0]
  • CIN=[CIN_INV:0] [CIN:7]
  • CLK=[CLK:71] [CLK_INV:0]
  • SR=[SR:20] [SR_INV:0]
SLICEL_CYMUXF
  • 0=[0:8] [0_INV:0]
  • 1=[1_INV:0] [1:8]
SLICEL_CYMUXG
  • 0=[0:7] [0_INV:0]
SLICEL_F5MUX
  • S0=[S0:41] [S0_INV:0]
SLICEL_F6MUX
  • S0=[S0:10] [S0_INV:0]
SLICEL_FFX
  • CE=[CE:50] [CE_INV:0]
  • CK=[CK:70] [CK_INV:0]
  • D=[D:70] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:70]
  • FFX_SR_ATTR=[SRLOW:70]
  • LATCH_OR_FF=[FF:70]
  • SR=[SR:20] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:62] [SYNC:8]
SLICEL_FFY
  • CE=[CE:25] [CE_INV:0]
  • CK=[CK:44] [CK_INV:0]
  • D=[D:44] [D_INV:0]
  • FFY_INIT_ATTR=[INIT0:44]
  • FFY_SR_ATTR=[SRLOW:44]
  • LATCH_OR_FF=[FF:44]
  • SR=[SR:11] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:44]
SLICEL_XORF
  • 1=[1_INV:0] [1:9]
SLICEM
  • BX=[BX_INV:0] [BX:64]
  • BY=[BY:64] [BY_INV:0]
  • CLK=[CLK:64] [CLK_INV:0]
  • SR=[SR:64] [SR_INV:0]
SLICEM_F
  • DI=[DI:64] [DI_INV:0]
  • LUT_OR_MEM=[RAM:64]
SLICEM_F5MUX
  • S0=[S0:64] [S0_INV:0]
SLICEM_F6MUX
  • S0=[S0:16] [S0_INV:0]
SLICEM_G
  • DI=[DI:64] [DI_INV:0]
  • LUT_OR_MEM=[RAM:64]
SLICEM_WSGEN
  • CK=[CK:64] [CK_INV:0]
  • WE=[WE_INV:0] [WE:64]
  • WE0=[WE0:64] [WE0_INV:0]
 
Pin Data
BSCAN
  • DRCK1=1
  • SEL1=1
  • TDI=1
  • TDO1=1
  • TDO2=1
  • UPDATE=1
BSCAN_BSCAN_BLACKBOX
  • DRCK1=1
  • SEL1=1
  • TDI=1
  • TDO1=1
  • TDO2=1
  • UPDATE=1
BUFGMUX
  • I0=3
  • O=3
  • S=3
BUFGMUX_GCLKMUX
  • I0=3
  • OUT=3
  • S=3
BUFGMUX_GCLK_BUFFER
  • IN=3
  • OUT=3
IBUF
  • I=16
  • PAD=16
IBUF_INBUF
  • IN=16
  • OUT=16
IBUF_PAD
  • PAD=16
IOB
  • O1=25
  • PAD=25
IOB_OUTBUF
  • IN=25
  • OUT=25
IOB_PAD
  • PAD=25
SLICEL
  • BX=85
  • BY=53
  • CE=51
  • CIN=7
  • CLK=71
  • COUT=7
  • F1=133
  • F2=127
  • F3=118
  • F4=41
  • F5=20
  • FXINA=10
  • FXINB=10
  • G1=131
  • G2=126
  • G3=117
  • G4=46
  • SR=20
  • X=101
  • XQ=70
  • Y=99
  • YQ=44
SLICEL_C1VDD
  • 1=1
SLICEL_CYMUXF
  • 0=8
  • 1=8
  • OUT=8
  • S0=8
SLICEL_CYMUXG
  • 0=7
  • 1=7
  • OUT=7
  • S0=7
SLICEL_F
  • A1=133
  • A2=127
  • A3=118
  • A4=41
  • D=133
SLICEL_F5MUX
  • F=41
  • G=41
  • OUT=41
  • S0=41
SLICEL_F6MUX
  • 0=10
  • 1=10
  • OUT=10
  • S0=10
SLICEL_FFX
  • CE=50
  • CK=70
  • D=70
  • Q=70
  • SR=20
SLICEL_FFY
  • CE=25
  • CK=44
  • D=44
  • Q=44
  • SR=11
SLICEL_G
  • A1=131
  • A2=126
  • A3=117
  • A4=46
  • D=131
SLICEL_GNDF
  • 0=3
SLICEL_GNDG
  • 0=3
SLICEL_XORF
  • 0=9
  • 1=9
  • O=9
SLICEL_XORG
  • 0=8
  • 1=8
  • O=8
SLICEM
  • BX=64
  • BY=64
  • CLK=64
  • F1=64
  • F2=64
  • F3=64
  • F4=64
  • G1=64
  • G2=64
  • G3=64
  • G4=64
  • SR=64
  • X=64
SLICEM_F
  • A1=64
  • A2=64
  • A3=64
  • A4=64
  • D=64
  • DI=64
  • WF1=64
  • WF2=64
  • WF3=64
  • WF4=64
  • WS=64
SLICEM_F5MUX
  • F=64
  • G=64
  • OUT=64
  • S0=64
SLICEM_F6MUX
  • 0=16
  • 1=16
  • OUT=16
  • S0=16
SLICEM_G
  • A1=64
  • A2=64
  • A3=64
  • A4=64
  • D=64
  • DI=64
  • WG1=64
  • WG2=64
  • WG3=64
  • WG4=64
  • WS=64
SLICEM_WSGEN
  • CK=64
  • WE=64
  • WE0=64
  • WSF=64
  • WSG=64
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -i -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
XSLTProcess 2 2 0 0 0 0 0
_impact 83 83 0 0 0 0 0
bitgen 62 62 0 0 0 0 0
bitinit 6 6 0 0 0 0 0
cpldfit 2 2 0 0 0 0 0
cse_server 6 3 0 0 0 0 0
elfcheck 23 23 0 0 0 0 0
hprep6 1 1 0 0 0 0 0
libgen 4 4 0 0 0 0 0
map 64 64 0 0 0 0 0
netgen 5 5 0 0 0 0 0
ngcbuild 57 57 0 0 0 0 0
ngdbuild 66 66 0 0 0 0 0
obngc 2 2 0 0 0 0 0
par 64 62 2 0 0 0 0
partgen 26 25 0 0 0 0 0
platgen 13 12 0 0 0 0 0
psf2Edward 4 4 0 0 0 0 0
taengine 1 1 0 0 0 0 0
trce 61 61 0 0 0 0 0
tsim 1 1 0 0 0 0 0
xdsgen 4 4 0 0 0 0 0
xps 22 22 0 0 0 0 0
xst 275 275 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/platform_studio/ps_c_ipw_configuring_fifos.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2011-05-14T20:09:36
PROP_intWbtProjectID=124D7235780B42AABDC4D2335D4A8EF4 PROP_intWbtProjectIteration=10
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_AutoTop=false PROP_DevFamily=Spartan3E
PROP_DevDevice=xc3s250e PROP_DevFamilyPMName=spartan3e
PROP_DevPackage=tq144 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-4 PROP_PreferredLanguage=Verilog
FILE_UCF=1 FILE_VERILOG=8
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=3 NGDBUILD_NUM_FD=24 NGDBUILD_NUM_FDC=15 NGDBUILD_NUM_FDCE=8
NGDBUILD_NUM_FDE=59 NGDBUILD_NUM_FDRE=8 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=15
NGDBUILD_NUM_INV=1 NGDBUILD_NUM_LUT1=8 NGDBUILD_NUM_LUT2=17 NGDBUILD_NUM_LUT2_D=1
NGDBUILD_NUM_LUT3=135 NGDBUILD_NUM_LUT3_L=13 NGDBUILD_NUM_LUT4=72 NGDBUILD_NUM_LUT4_D=8
NGDBUILD_NUM_LUT4_L=7 NGDBUILD_NUM_MUXCY=15 NGDBUILD_NUM_MUXF5=41 NGDBUILD_NUM_MUXF6=10
NGDBUILD_NUM_OBUF=25 NGDBUILD_NUM_RAM32X1S=64 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=17
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BSCAN_SPARTAN3=1 NGDBUILD_NUM_BUFG=3 NGDBUILD_NUM_FD=24 NGDBUILD_NUM_FDC=15
NGDBUILD_NUM_FDCE=8 NGDBUILD_NUM_FDE=59 NGDBUILD_NUM_FDRE=8 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=16 NGDBUILD_NUM_INV=1 NGDBUILD_NUM_LUT1=8 NGDBUILD_NUM_LUT2=17
NGDBUILD_NUM_LUT2_D=1 NGDBUILD_NUM_LUT3=135 NGDBUILD_NUM_LUT3_L=13 NGDBUILD_NUM_LUT4=72
NGDBUILD_NUM_LUT4_D=8 NGDBUILD_NUM_LUT4_L=7 NGDBUILD_NUM_MUXCY=15 NGDBUILD_NUM_MUXF5=41
NGDBUILD_NUM_MUXF6=10 NGDBUILD_NUM_OBUF=25 NGDBUILD_NUM_PULLDOWN=2 NGDBUILD_NUM_RAM32X1S=64
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=17