XR16 Project Status | |||
Project File: | XR16.ise | Current State: | Placed and Routed |
Module Name: | xsoc |
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No Errors |
Target Device: | xc3s200-4ft256 |
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51 Warnings |
Product Version: | ISE 9.2.02i |
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H okt. 1 12:36:16 2007 |
XR16 Partition Summary | |||
No partition information was found. |
Device Utilization Summary | ||||
Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slice Flip Flops | 530 | 3,840 | 13% | |
Number of 4 input LUTs | 999 | 3,840 | 26% | |
Logic Distribution | ||||
Number of occupied Slices | 709 | 1,920 | 36% | |
Number of Slices containing only related logic | 709 | 709 | 100% | |
Number of Slices containing unrelated logic | 0 | 709 | 0% | |
Total Number of 4 input LUTs | 1,098 | 3,840 | 28% | |
Number used as logic | 999 | |||
Number used as a route-thru | 31 | |||
Number used as 16x1 RAMs | 32 | |||
Number used as Shift registers | 36 | |||
Number of bonded IOBs | 66 | 173 | 38% | |
IOB Flip Flops | 21 | |||
Number of Block RAMs | 2 | 12 | 16% | |
Number of MULT18X18s | 1 | 12 | 8% | |
Number of GCLKs | 1 | 8 | 12% | |
Number of DCMs | 1 | 4 | 25% | |
Total equivalent gate count for design | 159,879 | |||
Additional JTAG gate count for IOBs | 3,168 |
Performance Summary | |||
Final Timing Score: | 0 | Pinout Data: | Pinout Report |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report |
Timing Constraints: | All Constraints Met |
Detailed Reports | |||||
Report Name | Status | Generated | Errors | Warnings | Infos |
Synthesis Report | Current | P szept. 21 14:44:53 2007 | 0 | 50 Warnings | 18 Infos |
Translation Report | Current | P szept. 21 14:48:03 2007 | 0 | 0 | 0 |
Map Report | Current | P szept. 21 14:48:19 2007 | 0 | 1 Warning | 4 Infos |
Place and Route Report | Current | P szept. 21 14:49:39 2007 | 0 | 0 | 3 Infos |
Static Timing Report | Current | P szept. 21 14:49:47 2007 | 0 | 0 | 3 Infos |
Bitgen Report | Out of Date | H szept. 17 14:07:47 2007 | 0 | 0 | 1 Info |