This master thesis introduces the possibility of the signal model based synthesis of the sound of organ pipes. First the limits of a classical organ are introduced (non-portability, maintenance cost), and according to these limits, the requirements of a modell-organ are discussed (portability, economical reproduction and high-quality sound). For the objective qualification of the existing methods and the signal model based one, the basic psychoacoustical parameters are discussed. These are the stationary spectrum (pitch, timbre), the transients (attack, decay), the quasi-steady properties (modulations, noise) and the external effects (reverberation, localisation). The properties of the hearing that can simplify a synthesis, are also discussed (phase-insensitivity, masking effects). The paper discusses henceforth the psychoacoustical parameters of the organ pipes using introduced physical properties. The analysis is based on original pipe-records. Next, the known synthesis methods are examined, including the Hammond-organ, the organs with analog circuits, the sampling method and the physical modeling. All of their advantages and disadvantages are discussed. After a short summarizing of the existing methods, the paper introduces the signal model based synthesis. The synthesis applies a periodic signal model that takes into account the basic psychoacoustical parameters mentioned above, and is based on the Fourier-expansion of the periodic signals. Implementing the parameters of a musical instrument, the conceptual signal generator is completed with filters and also a noise-generator. The parameters of the model were derivated off-line from original pipe-records by means of signal processing tools. The result of the method is convincing both for laymen and for musicians. Theoretically the introduced signal-model structure and the developed analysis method are also able to model other instruments that has no strong non-linear properties.
Keywords: organ, pipe, sound, synthesis
High-precision analog-to-digital conversion of high dynamic range, low-frequency signals is required in several applications of measurement and data acquisition. One solution to the problem is the incremental (or charge-balancing) delta-sigma converter, which represents a hybrid between the dual-slope converter and the first-order delta-sigma one. This dissertation extends the operation of the first-order incremental converter to higher-order delta-sigma loops. It discusses the basic operation of such structures, the achievable resolution, digital filter design methods, and their sensitivity to various imperfections. The thesis also compares the results with those found in the literature. The theoretical results are verified by simulations and by measurements made on an integrated circuit.
Keywords: incremental delta-sigma, analog-to-digital converter, no-latency, one-shot delta-sigma, DC measurement, decimation, sinc filter
A signal scaling circuit for accurately reducing the effective amplitude of an input signal by a rational factor N/M, where N and M are integers and N < M, is disclosed. An input, reference, bias and output node as well as control circuitry are selectively coupled to M switched capacitor circuits such that N/M scaling may be achieved. Cooperation between the M switched capacitor circuits and the control circuitry divides the M switched capacitors circuits into subsets of N and M - N switched capacitors, respectively. Each subset is then selectively coupled to an input, reference and/or bias signal to produce an output signal having as one of its components an N/M portion of the input signal. Error reduction in the scaled signal is achieved by shuffling the switched capacitor circuits populating each subset after selected time intervals.
Keywords: delta-sigma, signal scaling, switched capacitor, shuffling
ADC data sheets and test methods are not yet standardized. A new attempt to create a common platform for these is the draft standard IEEE-STD-1241. However, the methods described in this standard need extra effort from the user to exactly understand and implement them. It is therefore very reasonable to provide programs which implement these methods, and allow manufacturers and users to use them. This ensures that the same characterizing quantities will be used for the same purpose by everyone. The first attempt for this was a LabView program announced in 1999. In this paper –– after general considerations –– another implementation is presented, running under MATLAB. This will hopefully extend the number of the users of the methods described in the standard.
Keywords: IEEE-STD-1241; ADC testing; Sine wave method; MATLAB; EUPAS
Small improvements to the iteration procedure of the IEEE Standard 1241-2001 are suggested, and extension of the standard MATLAB program implementing the sine wave test is discussed. The program is compatible with the LabView program already announced, and in other working modes offers extensions, too.
Keywords: IEEE-STD-1241, ADC testing, sine wave method, MATLAB, four-parameter method
As the demand for DS (Delta-Sigma) analog-to-digital converters (ADCs) with higher bandwidth and higher signal-to-noise ratio (SNR) increases, designers have to look for efficient structures with low oversampling ratio (OSR). The Leslie-Singh or M–0 MASH architecture is often used in such applications. Based on this architecture, a reduced-sample-rate structure was introduced, which needs less chip area and power, but increases the noise floor. This paper describes a modification of the reduced-sample-rate structure which realizes an optimized transfer function, and avoids an SNR loss. In fact, it increases the SNR for high-order modulators. The method can also be applied to one-stage modulators. Simulation results for different MASH ADCs and sensitivity analysis verify the usefulness of the proposed technique.
Keywords: Leslie–Singh, MASH, modified (rotated) sinc-filter, multistage delta-sigma modulator, optimized noise transfer function, reduced-sample-rate.
A/D converters used in instrumentation and measurements often require high absolute accuracy, including very high linearity and negligible DC offset. The realization of high-resolution Nyquist-rate converters becomes very expensive when the resolution exceeds 16 bits. The conventional Delta-Sigma structures used in telecommunication and audio applications usually cannot satisfy the requirements of high absolute accuracy and very small offset. The incremental (or integrating) converter provides a solution for such measurement applications, as it has most advantages of the Delta-Sigma converter, yet is capable of offset-free and accurate conversion. In this paper, theoretical and practical aspects of higher-order incremental converters are discussed. The operating principles, topologies, specialized digital filter design methods and circuit level issues are all addressed. It is shown how speed, resolution and analog/digital complexity can be optimized for a given design, and how with some special digital filters improved speed/resolution ratio can be achieved. The theoretical results are verified by showing design examples and simulation results.
Keywords: Decimating filter, Delta-Sigma modulator, dither, incremental (integrating) analog-digital (A/D) converter, one-shot, no-latency, charge-balancing Delta-Sigma converter, staggered zeros, switched-capacitor circuits
In this paper signal-based and physics-based sound synthesis methods are described, with a particular emphasis on our own results achieved in the recent years. The applications of these methods are given for the case of organ, piano, and violin synthesis. The two techniques are compared based on these case studies, showing that in some cases the physics-based, in other cases the signal-based realization is more advantageous. As a theoretical result, we show that the two methods can be equivalent under special circumstances.
Keywords: digital signal processing, sound synthesis, musical acoustics, signal modeling, physical modeling, organ, piano, violin
Both cyclic and pipelined analog-to-digital (A/D) converters are getting more and more popular, as they are relatively easy to design and either have a high throughput (pipelined converters) or small area- and power-consumption (cyclic/algorithmic converters). To avoid saturation and to ensure effective digital calibration, in the analog stage(s) of these converters, instead of the ideal two, often a smaller nominal gain (called radix number) is used. In this paper, it is shown that these radix-based converters have nonmonotonic output and finite linearity. The causes of these phenomena are discussed in detail. Fully digital method is suggested to remove nonmonotonic code transitions and estimation on the maximum differential nonlinearity of the ideal converter as a function of the number of cycles is presented.
Keywords: Algorithmic, analog-digital (A/D) conversion, cyclic, differential nonlinearity, DNL, linearity, monotonicity, multistage pipelined, nonradix-2, radix less than 2, subradix ADC, subranging A/D converter.
This paper describes a low-power 22-bit incremental ADC, including an on-chip digital filter and a low-noise/low-drift oscillator, realized in a 0.6-um CMOS process. It incorporates a novel offset-cancellation scheme based on fractal sequences, a novel high-accuracy gain control circuit, and a novel reduced-complexity realization for the on-chip sinc filter. The measured output noise was 0.25 ppm (2.5 uVRMS), the dc offset 2 uV, the gain error 2 ppm, and the INL 4 ppm. The chip operates with a single 2.7 – 5 V supply, and draws only 120 uA current during conversion.
Keywords: Analog-to-digital conversion, CMOS analog integrated circuits, delta-sigma modulation, incremental data converters, low-power electronics, mixed analog-digital integrated circuits, oversampling A/D converters, switched-capacitor circuits.
The paper describes a special digital time-domain additive synthesis technique of the sound of organ pipes. The synthesis applies a periodic signal model that takes into account the basic psychoacoustical parameters of a musical sound: the stationary spectrum, the attack and decay transients, the quasi-steady properties and the external effects. The model is based on the Fourier-expansion of the periodic signals, which is completed with filters and noise-generator implementing the parameters above. The parameters of the model were derivated off-line from original pipe-records by means of signal processing tools. The result of the method is convincing both for laymen and for musicians. Theoretically the introduced signal-model structure and the developed analysis method are also able to model other instruments that has no strong non-linear properties.
Keywords: organ flue pipe, sound synthesis, periodic model
The paper describes a digital time-domain additive synthesis technique and its application to the synthesis of the sound of organ pipes. The model is based on the Fourier-expansion of the periodic signals. This periodic signal generator is completed with filters and noise-generator implementing the instrument-specific parameters. The novelty of the proposed method is that it utilizes independent IIR filters for each harmonics, which filters are responsible for the transient behavior of the sound. The result is convincing both for laymen and for musicians. For listening to it, there are some original and synthesized sample available at http://www.mit.bme.hu/ markus/organ. Additional advantage of the introduced signal-model structure is that it is able to model other instruments that has no strong non-linear properties.
Keywords: organ flue pipe, sound synthesis, periodic model
ADC data sheets and test methods are not yet standardized. A new attempt to create a common platform for these is the draft standard IEEE-STD-1241. However, the methods described in this standard need an extra effort from the user to exactly understand and implement them. It is therefore very reasonable to provide programs which implement these methods, and allow manufacturers and users to use them. This assures that the same characterizing quantities will be used for the same purpose by everyone. The first attempt for this was a LabView program announced in 1999. In this paper another implementation is presented, running under MATLAB. This will hopefully extend the number of the users of the methods described in the standard.
Keywords: IEEE-STD-1241, ADC testing, sine wave method, MATLAB, EUPAS
The approval of the 1241 standard means that all users and manufacturers of analog-to-digital converters should use the terminology and test methods described in the standard. However it is not an easy task to leave an already developed, tested and used environment for a new one. To inspire the users to use the standard, a program has been developed, which realizes most of the described algorithms. The program is also a testbed of new ideas, because it is very easy to extend the existing code with new algorithms and to compare the results to the standard using the same input and the same precision. The program has been written in MATLAB, and for easy of usage it provides a graphical user interface. It is also flexible enough to support different input/output file formats. The program is available through the Internet.
Keywords: ADC testing, IEEE-STD-1241, standardization, sine wave test method, windowing, MATLAB, data acquisition
In this paper a new optimized multi-stage Delta-Sigma structure is proposed. The method combines the reduced-sample-rate architecture with the optimization of the zeros of the noise transfer function (NTF). To achieve this, the first stage of the decimation filter has to be modified as well. Applying this method one can avoid the SNR loss introduced by using the reduced-sample-rate second-stage. The SNR can actually increase for higher-order structures. Simulation results for a 2-0 MASH structure with an oversampling ratio of 4 are shown to verify the technique.
Keywords: multi-stage delta-sigma modulator, MASH, Leslie-Singh, reduced-sample-rate, modified (rotated) sinc filter
Small improvements to the iteration procedure of the IEEE Standard 1241-2001 are suggested, and extension of the standard MATLAB program implementing the sine wave test is discussed. The program is compatible with the LabView program already announced, and in other working modes offers extensions, too.
Keywords: IEEE-STD-1241, ADC testing, sine wave method, MATLAB, four-parameter method
A/D converters used in instrumentation and measurements often require high absolute accuracy, including high linearity and negligible DC offset. The incremental (or integrating) converter provides a solution for such measurement applications, as it has all the advantages of the Delta-Sigma converter, yet is capable of offset-free and accurate conversion. In this conference paper, theoretical and practical aspects of higher-order incremental converters are discussed. Operating principles, topologies and specialized digital filter design methods are addressed. The theoretical results are verified by showing design examples and simulation results.
Keywords: mixed-signal, incremental (integrating) A/D converter, one-shot, one-cycle, no-latency converter, delta-sigma modulator, decimating filter.
Both cyclic and pipelined analog-to-digital converters are getting more and more popular, as they are relatively easy to design and either have a high throughput (pipelined converters) or small area- and power-consumption (cyclic/algorithmic converters). To avoid saturation and to ensure effective digital calibration, in the analog stage(s) of these converters, instead of the ideal two, often a smaller nominal gain (called radix number) is used. In this paper properties of these radix-based converters are discussed. First, it is shown that these type of converters produce non-monotonic output. The causes of this phenomena are discussed in detail and a method to avoid non-monotonicity is suggested. Second, it is shown that even the ideal sub-radix converters have limited linearity. Lower bound for the differential non-linearity (DNL) is calculated. The results about monotonicity can be used either to quickly locate and avoid non-monotonic code transitions in a converter. The derived expressions for the lower bound of the DNL can be used to estimate the minimum required number of cycles (stages) for a converter to push the DNL below the specification.
Keywords: Analog-digital conversion, multi-stage pipelined, cyclic, algorithmic, sub-ranging A/D converter, non-radix-2, radix less then 2, sub-radix ADC, monotonicity, linearity, differential non-linearity, DNL
A low-power 22-bit incremental ADC, including an onchip digital filter and a low-noise/low-drift oscillator, was realized in a 0.6-um CMOS process. It incorporates a novel offset-cancellation scheme based on fractal sequences, a novel high-accuracy gain control circuit, and a novel reduced-complexity realization for the on-chip sinc filter. The measured output noise was 0.28 ppm (2.8 uVRMS), the dc offset 2 uV, the gain error 2 ppm, and the INL 4 ppm. The chip operates with a single 2.7 – 5 V supply, and draws only 125 uA current during conversion.
In this paper the theoretical operation of incremental (charge-balancing) delta-sigma converters is reviewed, and the implementation of a 22-bit incremental A/D converter is described. Two different analyses of the first-order incremental converter are presented, and based on these results two extensions to higher-order modulators are proposed. Since line-frequency noise suppression is often important in measurement applications, modulators followed by sinck filters are also analyzed. Equations are derived for the estimation of the required number of cycles for a given resolution and architecture. Finally, the design and implementation of a third-order incremental converter with a fourth-order sinc filter is briefly discussed.
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