minirisc_system Project Status (09/25/2014 - 16:04:38) | |||
Project File: | MiniRISC_System.xise | Parser Errors: | No Errors |
Module Name: | minirisc_system | Implementation State: | Programming File Generated |
Target Device: | xc3s250e-4tq144 |
|
No Errors |
Product Version: | ISE 14.6 |
|
33 Warnings (0 new) |
Design Goal: | Balanced |
|
All Signals Completely Routed |
Design Strategy: | Xilinx Default (unlocked) |
|
All Constraints Met |
Environment: | System Settings |
|
0 (Timing Report) |
Device Utilization Summary | [-] | ||||
Logic Utilization | Used | Available | Utilization | Note(s) | |
Number of Slice Flip Flops | 641 | 4,896 | 13% | ||
Number of 4 input LUTs | 2,321 | 4,896 | 47% | ||
Number of occupied Slices | 1,414 | 2,448 | 57% | ||
Number of Slices containing only related logic | 1,414 | 1,414 | 100% | ||
Number of Slices containing unrelated logic | 0 | 1,414 | 0% | ||
Total Number of 4 input LUTs | 2,432 | 4,896 | 49% | ||
Number used as logic | 1,624 | ||||
Number used as a route-thru | 111 | ||||
Number used for Dual Port RAMs | 604 | ||||
Number used for 32x1 RAMs | 64 | ||||
Number used as Shift registers | 29 | ||||
Number of bonded IOBs | 68 | 108 | 62% | ||
Number of RAMB16s | 10 | 12 | 83% | ||
Number of BUFGMUXs | 1 | 24 | 4% | ||
Number of BSCANs | 1 | 1 | 100% | ||
Average Fanout of Non-Clock Nets | 4.15 |
Performance Summary | [-] | |||
Final Timing Score: | 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) | Pinout Data: | Pinout Report | |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
Timing Constraints: | All Constraints Met |
Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | Current | Cs szept. 25 16:03:40 2014 | 0 | 33 Warnings (0 new) | 17 Infos (1 new) | |
Translation Report | Current | Cs szept. 25 16:03:46 2014 | 0 | 0 | 0 | |
Map Report | Current | Cs szept. 25 16:03:52 2014 | 0 | 0 | 4 Infos (0 new) | |
Place and Route Report | Current | Cs szept. 25 16:04:18 2014 | 0 | 0 | 0 | |
Power Report | ||||||
Post-PAR Static Timing Report | Current | Cs szept. 25 16:04:24 2014 | 0 | 0 | 5 Infos (0 new) | |
Bitgen Report | Current | Cs szept. 25 16:04:35 2014 | 0 | 0 | 0 |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
WebTalk Report | Current | Cs szept. 25 16:04:36 2014 | |
WebTalk Log File | Current | Cs szept. 25 16:04:37 2014 |