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| Personal Information |
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Name: Péter Szántó
Place and date of birth: Budapest, 7th September, 1977.
Nationality: Hungarian
Marital status: single
Current Position: Research Assistant at Budapest University of Technology and Economics, Department of Measurement and Information Systems
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Research and development of FPGA based embedded systems and high performance hardware architectures: FPGArt Research and Development Ltd.
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| Studies |
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2004-2006:
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PhD student
Budapest University of Technology and Economics
Department of Measurement and Information Systems
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1996-2002:
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M.Sc. in Electrical Engineering
Budapest University of Technology and Economics
Faculty of Electrical Engineering
Department of Measurement and Information Systems
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| Language |
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English
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| Knowledge |
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HDL languages
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Verilog
VHDL
Celoxica Handel-C
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Programming languages
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Assembly
Pascal
C, C++, Visual C (MFC, Win32 API, DirectX)
PHP, HTML
SQL (MySQL, postgreSQL)
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Software
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Xilinx XST, EDK, System Generator
Synplicity Synplify, Premier, Synplify DSP, Amplify ISSP
Mentor Graphics ModelSim, Mentor Graphics FPGA Advantage
Celoxica DK Design Suite
Matlab
Adobe Photoshop, Corel Draw
MS Office
Macromedia Dreamweaver
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| Education |
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2003-2004:
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Logic Design (Embedded systems)
Logic Design Laboratory (Embedded Systems)
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